Field effect transistors (FETs) have become the most common building block for forming electronic circuits, and are commonly used as switches, amplifiers, and even to store data in some types of memory. Their use as switches in integrated circuits or electronic chips has enabled the rapid growth and high performance of common devices such as computers, cell phones, digital music players, and other digital electronics devices. Their use as switches also extends to higher power applications, such as automotive and industrial controls, communications equipment, and other applications requiring switching high voltages or currents.
FET devices for handling high power are often designed differently than the traditional FET devices used as switches in low power applications such as computerized circuits, as the structure of a typical FET device would not be able to handle the high voltages or currents without being destroyed. Destruction of a FET can occur through a variety of mechanisms, such as when the voltage between two terminals of the FET device exceeds the safe allowed voltage and reaches what is known as a breakdown voltage. The size of a FET device's components and the resistance of a FET device can also limit the current it is able to conduct or dissipate, which may effectively limit the voltage that can be applied.
Because power transistors often include features that extend relatively deep into the semiconductor substrate, forming power FET devices can also be challenging. Formation of many layers and many steps are often required simply to build a deep substrate region having the desired doped silicon properties for a power FET, adding to the challenge and expense of producing a commercially useful FET device.
Power FET devices will ideally have near zero power loss in the FET device itself, including low static power losses and low dynamic power loss. Static power losses occur when the device is in a conducting state, but the on-state resistance of the FET device is high enough to dissipate significant power. Low thermal impedance and reasonable thermal coefficients are also factors in static power loss when a device is operating at high voltage or current and its temperature begins to rise. Dynamic power losses occur when a transistor changes state, such as when the capacitance between two terminals of the FET such as between the gate and drain must be overcome for the FET device to switch states. The input signal capacitance at the gate and the output capacitance are both factors, as is reasonable freedom from charge recombination losses in the neighboring doped semiconductor regions of the FET.
These and other factors are considered in the design and manufacturing of power FET devices.